Important Dates

Paper Submission Deadline
May 31, 2025
Author Notification Due
August 8, 2025
Registration Starts
August 11, 2025
Final Paper Submission Deadline
September 10, 2025
Conference
October 20-22, 2025

Conference Venue

Kunibiki Messe (Matsue Convention Bureau)

1-2-1 Gakuen-minami, Matsue-shi, Shimane-ken, Japan

News & Updates

Feb. 7, 2025: Website Opened.

Scope

The Research Committee on Electronic Circuits of the Institute of Electrical Engineers of Japan (IEEJ) will hold 2025 International Conference on Analog VLSI Circuits (AVIC) in Matsue, Shimane on October 20th -22nd 2025.

AVIC is the successor of International Analog VLSI Workshop, which had been held for 28 years. The purpose of this conference is to discuss state-of-the-art ideas and results from researches on analog VLSI circuits and their applications. It has contributed to long-standing worldwide community of analog VLSI circuit experts in industry and academia.

Topics

AVIC 2025 covers topics related to analog and mixed-signal integrated circuits including but not limited to:


Organizer



The Institute of Electrical Engineers of Japan (IEEJ)

Sponsors



IEEE CASS Japan Joint Chapter



IEEE SSCS Japan Chapter